1. Field of the Invention
The present invention relates generally to communication, timing, or positioning devices that receive signals containing, encoded within, a known sequence positive and negative symbols of unknown phase, and particularly to devices that achieve reduction in errors resulting from multipath.
The invention discloses a method to produce a track reference signal, that when correlated against a code signal, produces a correlative-phase-discriminator that can act as a measure of the offset of the track reference signal relative to the code signal.
2. Description of the Related Art
Precise phase estimation is required by ranging and coherent communications systems. Existing ranging systems include Global Navigation Satellite Systems (GNSS), such as the United States Global Positioning System (GPS) and the Russian's Global Navigation Satellite System (GLONASS). These systems utilize a direct sequence spread spectrum (DSSS) signaling technique which modulates a carrier with a pseudo-random code sequence and a navigation message bit sequence. The navigation message contains precise satellite orbital information, an ionosphere model and timing information. The GNSS receiver tracks the carrier and code signal phases to obtain ranging information which is ultimately used to calculate the user's position and internal clock error. Consider the GPS Coarse/Acquisition code bit. This code bit has a 1/(1.023×106) second period which corresponds to a 300 m position resolution. Therefore, even a small 0.5° phase error corresponds to a large 0.4 m range error. Clearly, in the GNSS application, precise phase estimation is important.
When tracking a code signal, it is generally necessary to down-convert to base-band or near base-band using conventional digital carrier tracking methods such as a Costas loop. At base-band, carrier terms are removed to the degree that the remaining signal has a predominant code signal component. The phase of this code signal component may be tracked using a correlative code phase discriminator. Such a discriminator is the subject of this disclosure.
Most DSSS code bits, referred to as PN, PRN codes or chips, have a rectangular pulse shape with amplitudes +1 or −1 for the entire code bit period, TChip. An example code bit sequence is shown in FIG. 2A. Sometimes the code chips are depicted as 1's and 0's since they are digitally generated. It is important to note that in general DSSS systems are not restricted to rectangular code pulses and some systems design the code pulse shape to concentrate the desired power spectral density (dB-Watts/Hz) within a fixed bandwidth.
In acquiring the PN sequence for subsequent signal de-spreading, a track-reference signal is produced by the tracking hardware. This track reference signal will correlate in some manner with the PN sequence. The function of the code tracking loop is to keep the phase of the track-reference signal aligned to the phase of the incoming code signal by driving the phase error to zero. The control loop will advance or retard the track-reference signal in time until it aligns with the incoming signal (see FIG. 2B).
The code tracking loop consists of a phase discriminator, a loop filter and a Numerically Controlled Oscillator (NCO). The phase discriminator estimates the phase error between the incoming measured signal and the track-reference signal. The filtered phase error is output from the loop filter and provides a delta-phase. This delta-phase is accumulated in the NCO which adjusts the track-reference phase to drive the phase error to zero.
The control loop described above is referred to as a Delay Locked Loop (DLL). The original, continuous time DLL was originally described by Spilker (1961). He also introduces the derivative as the optimal correlation thereby proving that a DLL discriminator should only process on signal transitions and should remain zero elsewhere. The derivative is the maximum likelihood (ML) code bit transition estimator. The DLL is naturally extended to DSSS signals since the spreading (code bit) sequence is known in advance. This leads to the δ-delay Early-Late (EML) discriminator described by Gill (1966). Polydoros (1985) and Hurd (1970) analyzed loop performance with respect to δ for both low and high SNR and it was determined that the δ values other than ½ could be optimal.